1. Field of the Invention
The present invention relates to a semiconductor package and a method for fabricating the same, and more particularly to a semiconductor package and a method for fabricating the same capable of minimizing a bonding pad area.
2. Description of the Prior Art
As generally known in the art, chips are formed on a wafer by performing a thin film growing process with respect to the wafer and are separated from each other by sawing the wafer. A shielding process or a molding process is carried out in order to prevent the chip from being contaminated by moisture and impurities. A lead for connecting the chip to an external circuit is attached to the chip so that a semiconductor chip package is completed.
Among semiconductor chip packages, chip-sized semiconductor packages, in which chips occupy most of the space in the semiconductor chip packages, are commercialized as micro devices. The chip-sized semiconductor packages can increase density on a circuit board and integration degree of various integrated circuits, such as an ASIC (application specific integrated circuit).
FIG. 1 is a sectional view showing a conventional LOC (lead on chip) type semiconductor package.
As shown in FIG. 1, the conventional semiconductor package includes a substrate 12 having a contact hole (not shown) and a wire 15 for filling the contact hole, a semiconductor chip 10 having a plurality of bonding pad 11, an adhesive tape 14 interposed between the substrate 12 and the semiconductor chip 10, a bonding wire 13 for connecting the bonding pads 11 to one end of the wire 15, and a conductive ball (solder ball) 17 attached to the other end of the wire 15.
To fabricate the conventional semiconductor package having the above construction, the semiconductor chip 10 is first attached to an upper surface of the substrate 12 by using the adhesive tape 14. Then, the bonding pads 11 of the semiconductor chip 10 are electrically connected to the wire 15 of the substrate 12 through the bonding wire 13.
After that, the bonding wires 13 and the semiconductor chip 10 are covered with a molding member to prevent moisture and impurities from penetrating into the bonding wires 13 and the semiconductor chip 10. Then, the solder ball 17 is attached to the wire 15 of the substrate 12 so as to make an electric connection to an exterior, thereby completing the semiconductor package.
In a high-functional DRAM, such as a DDR or a DDR-2 which is an advanced memory device as compared with an SRAM, a chip has various functions, so it is required to increase a number of bonding pads. In addition, since there is a tendency to reduce a size of the chip, it is more required to fabricate the boding pad in a microscopic size, so a packaging process including a wire-bonding step may become more difficult, thereby lowering the reliability of the packaging process.